Rainbow-electronics MAX109 User Manual

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General Description
The MAX109, 2.2Gsps, 8-bit, analog-to-digital converter
(ADC) enables the accurate digitizing of analog signals
with frequencies up to 2.5GHz. Fabricated on an
advanced SiGe process, the MAX109 integrates a high-
performance track/hold (T/H) amplifier, a quantizer, and
a 1:4 demultiplexer on a single monolithic die. The
MAX109 also features adjustable offset, full-scale volt-
age (via REFIN), and sampling instance allowing multi-
ple ADCs to be interleaved in time.
The innovative design of the internal T/H amplifier,
which has a wide 2.8GHz full-power bandwidth,
enables a flat-frequency response through the second
Nyquist region. This results in excellent ENOB perfor-
mance of 6.9 bits. A fully differential comparator design
and decoding circuitry reduce out-of-sequence code
errors (thermometer bubbles or sparkle codes) and
provide excellent metastability performance (10
14
clock
cycles). This design guarantees no missing codes.
The analog input is designed for both differential and
single-ended use with a 500mV
P-P
input-voltage range.
The output data is in standard LVDS format, and is
demultiplexed by an internal 1:4 demultiplexer. The
LVDS outputs operate from a supply-voltage range of
3V to 3.6V for compatibility with single 3V-reference
systems. Control inputs are provided for interleaving
additional MAX109 devices to increase the effective
system-sampling rate.
The MAX109 is offered in a 256-pin Super Ball-Grid Array
(SBGA) package and is specified over the extended
industrial temperature range (-40°C to +85°C).
Applications
Radar Warning Receivers (RWR)
Light Detection and Ranging (LIDAR)
Digital RF/IF Signal Processing
Electronic Warfare (EW) Systems
High-Speed Data-Acquisition Systems
Digital Oscilloscopes
High-Energy Physics Instrumentation
ATE Systems
Features
Ultra-High-Speed, 8-Bit, 2.2Gsps ADC
2.8GHz Full-Power Analog Input Bandwidth
Excellent Signal-to-Noise Performance
44.6dB SNR at f
IN
= 300MHz
44dB SNR at f
IN
= 1600MHz
Superior Dynamic Range at High-IF
61.7dBc SFDR at f
IN
= 300MHz
50.3dBc SFDR at f
IN
= 1600MHz
-60dBc IM3 at f
IN1
= 1590MHz and f
IN2
= 1610MHz
500mV
P-P
Differential Analog Inputs
6.8W Typical Power Including the Demultiplexer
Adjustable Range for Offset, Full-Scale, and
Sampling Instance
50 Differential Analog Inputs
1:4 Demultiplexed LVDS Outputs
Interfaces Directly to Common FPGAs with DDR
and QDR Modes
MAX109
8-Bit, 2.2Gsps ADC with Track/Hold Amplifier
and 1:4 Demultiplexed LVDS Outputs
________________________________________________________________
Maxim Integrated Products
1
Ordering Information
19-0795; Rev 0; 4/07
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
D = Dry pack.
EVALUATION KIT
AVAILABLE
PART TEMP RANGE
PIN-
PACKAGE
PKG
CODE
MAX109EHF-D -40°C to +85°C 256 SBGA H256-1
TOP VIEW
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
1234567891011121314151617181920
MAX109
256-PIN SUPER BALL-GRID ARRAY
256-PIN
SBGA PACKAGE
Pin Configuration
Page view 0
1 2 3 4 5 6 ... 28 29

Summary of Contents

Page 1

General DescriptionThe MAX109, 2.2Gsps, 8-bit, analog-to-digital converter(ADC) enables the accurate digitizing of analog signalswith frequencies up t

Page 2

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs10 ______________________________________________________________

Page 3 - DC ELECTRICAL CHARACTERISTICS

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs_________________________________________________________________

Page 4 - -2 to +2 V

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs12 ______________________________________________________________

Page 5 - AC ELECTRICAL CHARACTERISTICS

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs_________________________________________________________________

Page 6

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs14 ______________________________________________________________

Page 7 - MAX109 toc03

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs_________________________________________________________________

Page 8

MAX109Detailed DescriptionThe MAX109 is an 8-bit, 2.2Gsps flash analog-to-digitalconverter (ADC) with an on-chip T/H amplifier and 1:4demultiplexed hi

Page 9

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs_________________________________________________________________

Page 10

MAX109Internal ReferenceThe MAX109 features an on-chip 2.5V precisionbandgap reference used to generate the full-scalerange for the data converter. Co

Page 11

(double data rate), and QDR (quadruple data rate).Setting these two bits for different modes allows theuser to update and process the outputs at one-q

Page 12 - Pin Description

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs2 _______________________________________________________________

Page 13 - Pin Description (continued)

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs20 ______________________________________________________________

Page 14

MAX109nal shift register is enabled and multiplexed with theinput of the 1:4 demultiplexer, replacing the quantizer8-bit output. The test pattern cons

Page 15

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs22 ______________________________________________________________

Page 16 - Detailed Description

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs_________________________________________________________________

Page 17 - Clock System

MAX109reset signal to match the latency of the converted ana-log data through the ADC. In this way, when reset dataarrives at the RSTOUTP/RSTOUTN LVDS

Page 18 - Demultiplexer Operation

integrated fans are available from Co-Fan USA (e.g.,the 30-1101-02 model, which is used on the evaluationkit of the MAX109). This particular heatsink

Page 19 - Generator Patterns

MAX109supply for the chip should have its own 0.01µF capaci-tor, which should be placed as close as possible to theMAX109 for optimum high-frequency n

Page 20

distortion includes all spectral components to theNyquist frequency excluding the fundamental and theDC offset.Effective Number of Bits (ENOB)ENOB ind

Page 21 - Applications Information

Package Information(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline informat

Page 22 - Single-Ended Analog Input

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS OutputsMaxim cannot assume responsibility for use of any circuitry other

Page 23 - Demultiplexer Reset Operation

MAX109ABSOLUTE MAXIMUM RATINGSDC ELECTRICAL CHARACTERISTICS(VCCA = VCCI = VCCD = 5V, VCCO = 3.3V, VEE = -5V, GNDA = GNDI = GNDO = GNDD = GNDR = 0V, VO

Page 24 - Thermal Management

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs4 _______________________________________________________________

Page 25 - Bypassing/Layout/Power Supply

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs_________________________________________________________________

Page 26 - Definitions

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs6 _______________________________________________________________

Page 27 - Full-Power Bandwidth

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs_________________________________________________________________

Page 28 - Package Information

MAX1098-Bit, 2.2Gsps ADC with Track/Hold Amplifier and 1:4 Demultiplexed LVDS Outputs8 _______________________________________________________________

Page 29 - CARDENAS

MAX109Typical Operating Characteristics (continued)(VCCA = VCCI = VCCD = 5V, VCCO = 3.3V, VEE = -5V, GNDA = GNDI = GNDD = GNDO = GNDR = 0V, fCLK = 2.2

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