DRAFTFeatures• Master and Slave Operation Possible• Supply Voltage up to 40V• Operating voltage VS = 5V to 27V• Typically 10 µA Supply Current During
104986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary] DRAFTThe VCC regulator is activated, and the internal LIN slave termination resistor is switch
114986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary]DRAFTFigure 4-5. LIN Wake Up from Sleep Mode Table 4-1. Table of ModesMode of Operation Transce
124986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary] DRAFT5. Wake-up Scenarios from Silent or Sleep Mode5.1 Remote Wake-up via Dominant Bus StateA
134986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary]DRAFT5.5 Fail-safe Features• During a short-circuit at LIN to VBattery, the output limits the o
144986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary] DRAFTFigure 5-1. VCC Voltage Regulator: Ramp-up and Undervoltage Detection Figure 5-2. Power D
154986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary]DRAFT6. WatchdogThe watchdog anticipates a trigger signal from the microcontroller at the NTRIG
164986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary] DRAFTFigure 6-1. Timing Sequence with RWD_OSC = 51 kΩ 6.2 Worst Case Calculation with RWD_OSC
174986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary]DRAFT7. Absolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” m
184986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary] DRAFT8. Electrical Characteristics5V < VS < 27V, -40°C < Tj < 150°C, unless otherw
194986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary]DRAFT4EN Input Pin4.1 Low-level voltage input EN VENL–0.3 +0.8 V A4.2 High-level voltage input
24986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary] DRAFTFigure 1-1. Block Diagram AdjustableWatchdogOscillatorShort Circuit andOvertemperatureProt
204986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary] DRAFT8.8Input leakage current at the receiver including pull-up resistor as specifiedInput lea
214986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary]DRAFT10.6 Duty cycle 1THRec(max) = 0.744 × VSTHDom(max) = 0.581 × VSVS = 7.0V to 18VtBit = 50 µ
224986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary] DRAFT13 Watchdog Oscillator13.1Voltage at WD_OSC in Normal ModeIWD_OSC = –200 µAVVS ≥ 4VVWD_OS
234986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary]DRAFT17 VCC Voltage Regulator ATA662217.1 Output voltage VCC4V < VS < 18V(0 mA to 50 mA)V
244986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary] DRAFTFigure 8-1. Definition of Bus Timing Characteristics TXD(Input to transmitting node)VS(Tr
254986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary]DRAFTFigure 8-2. Application Circuit 67 8 10920 19 18MLP 5 mm × 5 mm0.65 mm pitch20 leadATA6622
264986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary] DRAFT10. Package Information9. Ordering InformationExtended Type Number Package RemarksATA6622
274986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary]DRAFT11. Revision HistoryPlease note that the following page numbers referred to in this sectio
4986B–AUTO–07/07DRAFTHeadquarters InternationalAtmel Corporation2325 Orchard ParkwaySan Jose, CA 95131USATel: 1(408) 441-0311Fax: 1(408) 487-2600Atmel
34986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary]DRAFT2. Pin ConfigurationFigure 2-1. Pinning SO8 67 8 10920 19 18QFN 5 mm × 5 mm0.65 mm pitch20
44986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary] DRAFT3. Functional Description3.1 Physical Layer CompatibilitySince the LIN physical layer is i
54986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary]DRAFT3.7 Input/Output Pin (TXD)In Normal Mode the TXD pin is the microcontroller interface used
64986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary] DRAFT3.13 TM Input PinThe TM pin is used for final production measurements at Atmel®. In normal
74986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary]DRAFT4. Modes of OperationFigure 4-1. Modes of Operation 4.1 Normal ModeThis is the normal trans
84986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary] DRAFTA voltage less than the LIN Pre_Wake detection VLINL at the LIN pin activates the internal
94986B–AUTO–07/07ATA6622/ATA6624/ATA6626 [Preliminary]DRAFTFigure 4-3. LIN Wake Up from Silent Mode 4.3 Sleep ModeA falling edge at EN when TXD is low
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