Rainbow-electronics DS2404 User Manual

1 of 29 110501FEATURES§ 4096 bits of nonvolatile dual-port memoryincluding real time clock/calendar in binaryformat, programmable interval timer, and

DS240410 of 29MEMORY FUNCTION FLOW CHART Figure 6

DS240411 of 29Read Memory [F0h]The read memory command may be used to read the entire memory. After issuing the command, the usermust provide the 2-b

DS240412 of 29Example 2: Write two data bytes to memory locations 0026h and 0027h (the seventh and eighth byte ofpage 1). Read entire memory (1-Wire

DS240413 of 29The write protect bits, once set, permanently write protects their corresponding counter and alarmregisters, all write protect bits, an

DS240414 of 29HARDWARE CONFIGURATION Figure 8NOTE:Depending on 1-Wire communication speed and bus load characteristics, the optimal pull-up resistorv

DS240415 of 29Match ROM [55h]The match ROM command, followed by a 64-bit ROM sequence, allows the bus master to address aspecific DS2404 on a multidr

DS240416 of 29ROM FUNCTIONS FLOW CHART (1-WIRE PORT ONLY) Figure 9(See Figure 8)

DS240417 of 291-WIRE SIGNALINGThe DS2404 requires strict protocols to ensure data integrity. The protocol consists of five types ofsignaling on one l

DS240418 of 29READ/WRITE TIMING DIAGRAM Figure 11Write-one Time Slot60ms < tSLOT < 120ms1ms £ tLOW1 < 15ms1ms £ tREC < ¥Write-zero Time S

DS240419 of 29InterruptsIf the DS2404 detects an alarm condition, it will automatically set the corresponding alarm flag (CCF,ITF or RTF) in the Stat

DS24042 of 29The DS2404 features can be used to create a stopwatch, alarm clock, time and date stamp, logbook, hourmeter, calendar, system power-cycl

DS240420 of 29TYPE 1 INTERRUPT Figure 12TYPE 1A INTERRUPT (SPECIAL CASE) Figure 13TYPE 2 INTERRUPT Figure 14DS2404

DS240421 of 29TYPE 2 INTERRUPT (SPECIAL CASE) Figure 153-WIRE I/O COMMUNICATIONSThe 3–wire bus is comprised of three signals. These are the RST (res

DS240422 of 29VCC Operate Mode (Battery-Backed)Figure 16 shows the necessary connections for operating the DS2404 in VCC Operate mode.VCC OPERATE MOD

DS240423 of 29Battery Operate ModeFigure 17 shows the necessary connections for operating the DS2404 in Battery Operate mode.BATTERY OPERATE MODE Fig

DS240424 of 29OPERATION MODES AND CONDITIONS Table 1PORT USAGE BATTERY OPERATE MODE VCC OPERATE MODE (BATTERY BACKED)1-Wire onlyFloat RST , DQ, CLK

DS240425 of 29CRYSTAL PLACEMENT ON PCB Figure 183-WIRE WRITE DATA TIMING DIAGRAM Figure 193-WIRE READ DATA TIMING DIAGRAM Figure 20

DS240426 of 29ABSOLUTE MAXIMUM RATINGS*Voltage on DATA to Ground -0.5V to +7.0VOperating Temperature Range -40°C to +85°CStorage Temperature Range -

DS240427 of 29CAPACITANCE (tA = 25°C)PARAMETER SYMBOL MIN TYP MAX UNITS NOTESInput Capacitance CIN10 pFOutput Capacitance COUT15 pFI/O (1-Wire) I

DS240428 of 29NOTES:1. All voltages are referenced to ground.2. VIH = 2.0V or VIL = 0.8V with 10ns maximum rise and fall time.3. VDQH = 2.4V and V

DS240429 of 2920. The reset low time (tRSTL) should be restricted to a maximum of 960ms, to allow interrupt signaling,otherwise, it could mask or con

DS24043 of 294) skip ROM or 5) search interrupt. After a ROM function sequence has been successfully executed, thememory functions are accessible and

DS24044 of 29Port selection is accomplished on a first-come, first-serve basis. Whichever port comes out of reset firstwill obtain control. For the 3

DS24045 of 29MEMORY MAP Figure 4

DS24046 of 29MEMORYThe memory map in Figure 4 shows a page (32 bytes) called the scratchpad and 17 pages called memory.Pages 0 through 15 each contai

DS24047 of 29Alarm RegistersThe alarm registers for the real-time clock, interval timer, and cycle counter all operate in the samemanner. When the va

DS24048 of 29Setting a write protect bit to a logic 1 will permanently write protect the corresponding counter and alarmregisters, all write protect

DS24049 of 29The third register (E/S) is a read only register. The first five bits (E4: E0) of this register are called theending offset. The ending