Rainbow-electronics W78C32C User Manual

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W78C32C
8-BIT MICROCONTROLLER
Publication Release Date: July 1999
- 1 - Revision A2
GENERAL DESCRIPTION
The W78C32C microcontroller supplies a wider frequency range than most 8-bit microcontrollers on
the market. It is compatible with the industry standard 80C32 microcontroller series.
The W78C32C contains four 8-bit bidirectional parallel ports, three 16-bit timer/counters, and a serial
port. These peripherals are supported by a six-source, two-level interrupt capability. There are 256
bytes of RAM, and the device supports ROMless operation for application programs.
The W78C32C microcontroller has two power reduction modes, idle mode and power-down mode,
both of which are software selectable. The idle mode turns off the processor clock but allows for
continued peripheral operation. The power-down mode stops the crystal oscillator for minimum power
consumption. The external clock can be stopped at any time and in any state without affecting the
1.processor.
FEATURES
8-bit CMOS microcontroller
Fully static design
Low standby current at full supply voltage
DC-40 MHz operation
256 bytes of on-chip scratchpad RAM
ROMless operation
64K bytes program memory address space
64K bytes data memory address space
Four 8-bit bidirectional ports
Three 16-bit timer/counters
One full duplex serial port
Boolean processor
Six-source, two-level interrupt capability
Built-in power management
Packages:
DIP 40: W78C32C-24/40
PLCC 44: W78C32CP-24/40
QFP 44: W78C32CF-24/40
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Summary of Contents

Page 1 - 8-BIT MICROCONTROLLER

W78C32C 8-BIT MICROCONTROLLER Publication Release Date: July 1999 - 1 - Revision A2 GENERAL DESCRIPTION The W78C32C microcontroller supplies a wi

Page 2

W78C32C - 10 - Timing Waveforms, continued Data Write Cycle S2 S3S5 S6 S1S2 S3 S4S1S5 S6S4XTAL1ALE PSENA8-A15DATA OUTPORT 2PORT 0 A0-A7 WRTTDAWDADTDW

Page 3

W78C32C Publication Release Date: July 1999 - 11 - Revision A2 TYPICAL APPLICATION CIRCUIT Using External Program Memory and Crystal AD0A0A0A0 1

Page 4

W78C32C - 12 - Expanded External Data Memory and Oscillator 10 u8.2 KVOSCILLATOREA 31XTAL1 19XTAL2 18RST 9INT0 12INT1 13T0 14T1 15P1.0 1P1.1 2P1.2

Page 5

W78C32C Publication Release Date: July 1999 - 13 - Revision A2 PACKAGE DIMENSIONS 40-pin DIP Seating Plane1. Dimension D Max. & S include mo

Page 6

W78C32C - 14 - Package Dimensions, continued 44-pin QFP Seating Plane112212See Detail FebAy1AALL1cEEH1D44HD3433Detail F1. Dimension D & E do not

Page 7

W78C32C - 2 - PIN CONFIGURATIONS Vcc12345678910111213141516171819203940343536373830313233262728292122232425P0.0, AD0P0.1, AD1P0.2, AD2P0.3, AD3P0.4,

Page 8

W78C32C Publication Release Date: July 1999 - 3 - Revision A2 PIN DESCRIPTION P0.0−P0.7 Port 0, Bits 0 through 7. Port 0 is a bidirectional I/O

Page 9

W78C32C - 4 - PSEN Program Store Enable Output, active low. PSEN enables the external ROM onto the Port 0 address/data bus during fetch and MOVC oper

Page 10

W78C32C Publication Release Date: July 1999 - 5 - Revision A2 FUNCTIONAL DESCRIPTION The W78C32C architecture consists of a core controller surr

Page 11

W78C32C - 6 - Reset The external RESET signal is sampled at S5P2. To take effect, it must be held high for at least two machine cycles while the osci

Page 12

W78C32C Publication Release Date: July 1999 - 7 - Revision A2 DC Characteristics, continued PARAMETER SYM. TEST CONDITIONS SPECIFICATION UNIT

Page 13

W78C32C - 8 - Program Fetch Cycle PARAMETER SYMBOL MIN. TYP. MAX. UNIT NOTES Address Valid to ALE Low TAAS 1 TCP-∆ - - nS 4 Address Hold af

Page 14

W78C32C Publication Release Date: July 1999 - 9 - Revision A2 Port Access Cycle PARAMETER SYMBOL MIN. TYP. MAX. UNIT Port Input Setup to ALE

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