Rainbow-electronics ATF750CL User Manual

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1
Features
Advanced, High-speed, Electrically-erasable Programmable Logic Device
Superset of 22V10
Enhanced Logic Flexibility
Backward Compatible with ATV750B/BL and ATV750/L
Low-power Edge-sensing “L” Option with 1 mA Standby Current
D- or T-type Flip-flop
Product Term or Direct Input Pin Clocking
7.5 ns Maximum Pin-to-pin Delay with 5V Operation
Highest Density Programmable Logic Available in 24-pin Package
Advanced Electrically-erasable Technology
Reprogrammable
100% Tested
Increased Logic Flexibility
42 Array Inputs, 20 Sum Terms and 20 Flip-flops
Enhanced Output Logic Flexibility
All 20 Flip-flops Feed Back Internally
10 Flip-flops are also Available as Outputs
Programmable Pin-keeper Circuits
Dual-in-line and Surface Mount Package in Standard Pinouts
Commercial and Industrial Temperature Ranges
20-year Data Retention
2000V ESD Protection
1000 Erase/Write Cycles
Block Diagram
Description
The ATF750C(L)s are twice as powerful as most other 24-pin programmable logic
devices. Increased product terms, sum terms, flip-flops and output logic configurations
translate into more usable gates. High-speed logic and uniform predictable delays
PROGRAMMABLE
INTERCONNECT
AND
COMBINATORIAL
LOGIC ARRAY
LOGIC
OPTION
(UP T0 20
FLIP-FLOPS)
OUTPUT
OPTION
4TO8
PRODUCT
TERMS
(OE PRODUCT TERMS)
10
I/O
PINS
12
INPUT
PINS
(CLOCK PIN)
Rev. 0776H–03/01
High-speed
Complex
Programmable
Logic Device
ATF750C
ATF750CL
Pin Configurations
Pin Name Function
CLK Clock
IN Logic Inputs
I/O Bi-directional Buffers
GND Ground
VCC +5V Supply
(continued)
DIP/SOIC/TSSOP
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
PLCC
5
6
7
8
9
10
11
25
24
23
22
21
20
19
IN
IN
IN
GND *
IN
IN
IN
I/O
I/O
I/O
GND *
I/O
I/O
I/O
4
3
2
1
28
27
26
12
13
14
15
16
17
18
IN
IN
GND
GND *
IN
I/O
I/O
IN
IN
CLK/IN
VCC *
VCC
I/O
I/O
Note: For PLCC, pins 1, 8, 15, and 22
can be left unconnected. For
superior performance, connect
VCC to pin 1 and GND to pins
8, 15, and 22.
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Summary of Contents

Page 1 - Pin Configurations

1Features• Advanced, High-speed, Electrically-erasable Programmable Logic Device– Superset of 22V10– Enhanced Logic Flexibility– Backward Compatible w

Page 2

ATF750C(L)10Preload of Registered OutputsThe ATF750C(L)’s registers are provided with circuitry toallow loading of each register asynchronously with e

Page 3

ATF750C(L)11Using the ATF750C’s Many Advanced FeaturesThe ATF750C(L)’s advanced flexibility packs more usablegates into 24 pins than any other logic d

Page 4

ATF750C(L)12ATF750C SUPPLY CURRENT VS.SUPPLY VOLTAGE (TA = 25°C)0204060801001201404.50 4.75 5.00 5.25 5.50SUPPLY VOLTAGE (V)ICC (mA)SUPPLY CURRENT VS.

Page 5

ATF750C(L)13ATF750C/CL OUTPUT SINK CURRENTVS. SUPPLY VOLTAGE (VOL = 0.5V)343536373839404142434444.555.56SUPPLY VOLTAGE (V)IOL (mA)ATF750C/CL OUTPUT S

Page 6

ATF750C(L)14Note: 1. Special order only: TSSOP package requires special thermal management.Using “C” Product for IndustrialTo use commercial product f

Page 7

ATF750C(L)15Packaging Information.045(1.14) X 45°PIN NO. 1IDENTIFY.032(.813).026(.660).050(1.27) TYP.300(7.62) REF SQ.045(1.14) X 30° - 45°.022(.559)

Page 8

© Atmel Corporation 2001.Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standa

Page 9

ATF750C(L)2guarantee fast in-system performance. The ATF750C(L) isa high-performance CMOS (electrically-erasable) complexprogrammable logic device (CP

Page 10 - ATF750C(L)

ATF750C(L)3Logic OptionsCombinatorial Output Registered OutputClock MuxOutput OptionsCombined Terms Separate TermsCombined Terms Separate TermsSELECTL

Page 11

ATF750C(L)4Bus-friendly Pin-keeper Input and I/OsAll input and I/O pins on the ATF750C(L) have programma-ble “pin-keeper” circuits. If activated, when

Page 12

ATF750C(L)5Note: 1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec.Input Test Waveforms

Page 13

ATF750C(L)6AC Waveforms, Product Term Clock(1)Note: 1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwi

Page 14

ATF750C(L)7AC Waveforms, Input Pin Clock(1)Notes: 1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise

Page 15

ATF750C(L)8Functional Logic Diagram ATF750C, Upper Half

Page 16 - 0776H–03/01xM

ATF750C(L)9Functional Logic Diagram ATF750C, Lower Half

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