1Features•Fast Read Access Time - 45 ns•Low-Power CMOS Operation– 100 µµµµA max. Standby– 20 mA max. Active at 5 MHz •JEDEC Standard Packages– 28-Lead
AT27C256R1090 20 0.1 AT27C256R-90JCAT27C256R-90PCAT27C256R-90RCAT27C256R-90TC32J28P628R28TCommercial(0°C to 70°C)20 0.1 AT27C256R-90JIAT27C256R-90PIAT
AT27C256R11Packaging Information.045(1.14) X 45°PIN NO. 1IDENTIFY.025(.635) X 30° - 45°.012(.305).008(.203).021(.533).013(.330).530(13.5).490(12.4).03
© Atmel Corporation 1998.Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standa
AT27C256R2The AT27C256R is available in a choice of industry stan-dard JEDEC-approved one time programmable (OTP)plastic DIP, PLCC, SOIC, and TSOP pac
AT27C256R3Block DiagramNotes: 1. X can be VIL or VIH.2. Refer to Programming Characteristics. 3. VH = 12.0 ± 0.5V.4. Two identifier bytes may be selec
AT27C256R4Notes: 1. VCC must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP..2. VPP may be connected direc
AT27C256R5AC Waveforms for Read Operation(1)Notes: 1. Timing measurement reference level is 1.5V for -45 and -55 devices. Input AC drive levels are VI
AT27C256R6Programming Waveforms(1)Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH.2. tOE and tDFP are characteristics of the dev
AT27C256R7Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP..2. This parameter is only sampled and is
AT27C256R8Rapid Programming AlgorithmA 100 µs CE pulse width is used to program. The addressis set to the first location. VCC is raised to 6.5V and VP
AT27C256R9Ordering InformationtACC(ns)ICC (mA)Ordering Code Package Operation RangeActive Standby45 20 0.1 AT27C256R-45JCAT27C256R-45PCAT27C256R-45RCA
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