Rainbow-electronics ATAR862-8 User Manual download pdf (Page 14)

ATAR862-8

4589B–4BMCU–02/03

Introduction The ATAR862-8 is a member of Atmel’s family of 4-bit single-chip microcontrollers. It

contains ROM, RAM, parallel I/O ports, two 8-bit programmable multifunction

timer/counters, voltage supervisor, interval timer with watchdog function and a sophisti-

cated on-chip clock generation with integrated RC-, 32-kHz and 4-MHz crystal

oscillators.

Table 1. Available Variants of M4xCx9x

MARC4 Architecture

General Description

The MARC4 microcontroller consists of an advanced stack-based, 4-bit CPU core and

on-chip peripherals. The CPU is based on the Harvard architecture with physically sep-

arated program memory (ROM) and data memory (RAM). Three independent buses,

the instruction bus, the memory bus and the I/O bus, are used for parallel communica-

tion between ROM, RAM and peripherals. This enhances program execution speed by

allowing both instruction prefetching, and a simultaneous communication to the on-chip

peripheral circuitry. The extremely powerful integrated interrupt controller with associ-

ated eight prioritized interrupt levels supports fast and efficient processing of hardware

events. The MARC4 is designed for the high-level programming language qFORTH.

The core includes both an expression and a return stack. This architecture enables

high-level language programming without any loss of efficiency or code density.

Figure 10. MARC4 Core

Components of

MARC4 Core

The core contains ROM, RAM, ALU, program counter, RAM address registers, instruc-

tion decoder and interrupt controller. The following sections describe each functional

block in more detail.

Version Type ROM E2PROM Peripheral Packages

Flash

device

T48C862 4-Kbyte EEPROM 64-bytes SSO24

Production ATAR862 4-Kbyte Mask ROM 64-bytes SSO24

Instruction

decoder

CCR

TOS

ALU

RAM

Program

256 x 4-bit

MARC4 CORE

Clock

Reset

Sleep

Memory bus

I/O bus

Instruction

bus

Reset

System

clock

Interrupt

controller

On-chip peripheral modules

memory

1 2 ... 9 10 11 12 13 14 15 16 17 18 19 ... 105 106

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