Rainbow-electronics ATAR862-8 User Manual

1Features• Single Package Fully-integrated ROM Mask 4-bit Microcontroller with RF Transmitter• Low Power Consumption in Sleep Mode (< 1 µA Typicall

10ATAR862-8 4589B–4BMCU–02/03Figure 7. FSK Application Circuit CLKPA_ENABLEANT2ANT1ENABLEGNDVSXTAL212223241234VCOLFCPPFDf32XTOPLLPAf4Power up/downC3

100ATAR862-8 4589B–4BMCU–02/03Table of Contents Features ...

101ATAR862-84589B–4BMCU–02/03Return Stack ...15Register

102ATAR862-8 4589B–4BMCU–02/03Bi-directional Ports ... 33Bi-directional Por

103ATAR862-84589B–4BMCU–02/03Timer 3 – Mode 2: Timer/Counter, External Trigger Restart and External Capture (with T3I Input) ...

104ATAR862-8 4589B–4BMCU–02/03Serial Receive Buffer (SRB) – Byte Read ...76Combination Modes ...

105ATAR862-84589B–4BMCU–02/03Thermal Resistance ... 94DC Operating Characteri

Printed on recycled paper.© Atmel Corporation 2003.Atmel Corporation makes no warranty for the use of its products, other than those expressly contai

11ATAR862-84589B–4BMCU–02/03Figure 8. ESD Protection Circuit CLK PA_ENABLEANT2ANT1XTAL ENABLEVSGNDAbsolute Maximum RatingsParameters Symbol Min. Max.

12ATAR862-8 4589B–4BMCU–02/03Output power variation for the full temperature rangeTamb = -40°C to +85°CVS = 3.0 VVS = 2.0 VDPRefDPRef-1.5-4.0dBdBOutp

13ATAR862-84589B–4BMCU–02/03Microcontroller BlockFeatures• Extended Temperature Range for High Temperature up to 125°C• 4-Kbyte ROM, 256 x 4-bit RAM•

14ATAR862-8 4589B–4BMCU–02/03Introduction The ATAR862-8 is a member of Atmel’s family of 4-bit single-chip microcontrollers. Itcontains ROM, RAM, par

15ATAR862-84589B–4BMCU–02/03ROM The program memory (ROM) is mask programmed with the customer application pro-gram during the fabrication of the micro

16ATAR862-8 4589B–4BMCU–02/03Figure 12. RAM Map Registers The microcontroller has seven programmable registers and one condition code register(see F

17ATAR862-84589B–4BMCU–02/03RAM Address Registers The RAM is addressed with the four 8-bit wide RAM address registers: SP, RP, X and Y.These registers

18ATAR862-8 4589B–4BMCU–02/03ALU The 4-bit ALU performs all the arithmetic, logical, shift and rotate operations with the toptwo elements of the expr

19ATAR862-84589B–4BMCU–02/03Interrupt Processing For processing the eight interrupt levels, the MARC4 includes an interrupt controller withtwo 8-bit w

2ATAR862-8 4589B–4BMCU–02/03Pin ConfigurationFigure 2. Pinning SSO24 XTALVSGNDENABLENRESETBP63/T3IBP20/NTEBP23BP41/T2I/VMIBP42/T2OBP43/SD/INT3VSSANT

20ATAR862-8 4589B–4BMCU–02/03Table 2. Interrupt Priority Table Table 3. Hardware Interrupts Software Interrupts The programmer can generate interru

21ATAR862-84589B–4BMCU–02/03Master Reset The master reset forces the CPU into a well-defined condition. It is unmaskable and isactivated independent o

22ATAR862-8 4589B–4BMCU–02/03A power-on reset pulse is generated by a VDD rise across the default BOT voltage level(1.7 V). A brown-out reset pulse i

23ATAR862-84589B–4BMCU–02/03Figure 18. Voltage Monitor Voltage Monitor Control/ Status RegisterPrimary register address: "F’hex"VM2: Voltag

24ATAR862-8 4589B–4BMCU–02/03Figure 19. Internal Supply Voltage Supervisor Figure 20. External Input Voltage Supervisor Clock GenerationClock Modul

25ATAR862-84589B–4BMCU–02/03Figure 21. Clock Module Table 4. Clock Modes The clock module generates two output clocks. One is the system clock (SYSC

26ATAR862-8 4589B–4BMCU–02/03Figure 22. RC-oscillator 1 External Input Clock The OSC1 or OSC2 (mask option) can be driven by an external clock sourc

27ATAR862-84589B–4BMCU–02/03Figure 24. RC-oscillator 2 4-MHz Oscillator The microcontroller block 4-MHz oscillator options need a crystal or ceramic

28ATAR862-8 4589B–4BMCU–02/03Figure 27. 32-kHz Crystal Oscillator Clock Management The clock management register controls the system clock divider a

29ATAR862-84589B–4BMCU–02/03System Configuration Register (SC)Primary register address: "3"hexPower-down Modes The sleep mode is a shut-down

3ATAR862-84589B–4BMCU–02/035 XTAL Connection for crystal6 VS Supply voltage ESD protection circuitry (see Figure 8)7 GND Ground ESD protection circuit

30ATAR862-8 4589B–4BMCU–02/03The microcontroller block has various power-down modes. During the sleep mode theclock for the MARC4 core is stopped. Wi

31ATAR862-84589B–4BMCU–02/03Figure 28. Example of I/O Addressing 12345Module ASWModule M1Module M2 Module M3Auxiliary SwitchModulePrimary Reg.(Addres

32ATAR862-8 4589B–4BMCU–02/03Table 6. Peripheral Addresses Port Address NameWrite/Read Reset Value Register Function Module Type1 P1DAT W/R 1xx1b Po

33ATAR862-84589B–4BMCU–02/03Bi-directional Ports With the exception of Port 1 and Port 6, all other ports (2, 4 and 5) are 4 bits wide. Port 1and Port

34ATAR862-8 4589B–4BMCU–02/03Figure 29. Bi-directional Port 1 Bi-directional Port 2 As all other bi-directional ports, this port includes a bitwise

35ATAR862-84589B–4BMCU–02/03Port 2 Data Register (P2DAT) Primary register address: "2"hex* Bit 3 -> MSB, Bit 0 -> LSBPort 2 Control Re

36ATAR862-8 4589B–4BMCU–02/03Figure 31. Bi-directional Port 5 Figure 32. Port 5 External Interrupts Port 5 Data Register (P5DAT) Primary register a

37ATAR862-84589B–4BMCU–02/03Table 7. P5xM2, P5xM1 – Port 5x Interrupt Mode/Direction Code Bi-directional Port 4 The bi-directional Port 4 is a bitwis

38ATAR862-8 4589B–4BMCU–02/03Port 4 Data Register (P4DAT) Primary register address: "4"hexPort 4 Control Register (P4CR) Byte WriteAuxiliar

39ATAR862-84589B–4BMCU–02/03Port 6 Data Register (P6DAT) Primary register address: "6"hexPort 6 Control Register (P6CR) Auxiliary register a

4ATAR862-8 4589B–4BMCU–02/03UHF ASK/FSK Transmitter BlockFeatures• Integrated PLL Loop Filter• ESD Protection (4 kV HBM/200 V MM, Except Pin 2: 4 kV

40ATAR862-8 4589B–4BMCU–02/03Figure 34. UTCM Block Diagram Timer 1 The Timer 1 is an interval timer which can be used to generate periodical interru

41ATAR862-84589B–4BMCU–02/03This timer starts running automatically after any power-on reset! If the watchdog func-tion is not activated, the timer ca

42ATAR862-8 4589B–4BMCU–02/03Timer 1 Control Register 1 (T1C1)Address: "7"hex - Subaddress: "8"hex* Bit 3 -> MSB, Bit 0 ->

43ATAR862-84589B–4BMCU–02/03Timer 1 Control Register 2 (T1C2)Address: "7"hex - Subaddress: "9"hex* Bit 3 -> MSB, Bit 0 ->

44ATAR862-8 4589B–4BMCU–02/03Timer 2 8-/12-bit Timer for:• Interrupt, square-wave, pulse and duty cycle generation • Baud-rate generation for the int

45ATAR862-84589B–4BMCU–02/03Figure 37. Timer 2 Timer 2 ModesMode 1: 12-bit Compare CounterThe 4-bit stage and the 8-bit stage work together as a 12-b

46ATAR862-8 4589B–4BMCU–02/03The 4-bit stage is used as programmable prescaler for the 8-bit counter stage. In thismode, a duty cycle stage is also a

47ATAR862-84589B–4BMCU–02/03Figure 41. Timer 2 Modulator Output Stage Timer 2 Output SignalsTimer 2 Output Mode 1 Toggle Mode A: A Timer 2 compare ma

48ATAR862-8 4589B–4BMCU–02/03Toggle Mode C: A Timer 2 compare match toggles the output flip-flop (M2) -> T2OFigure 44. Pulse Generator – the Time

49ATAR862-84589B–4BMCU–02/03Timer 2 Output Mode 4 Biphase Modulator: Timer 2 Modulates the SSI Internal Data Output (SO) to Biphase Code. Figure 47.

5ATAR862-84589B–4BMCU–02/03Figure 3. Block Diagram CLKPA_ENABLEANT2ANT1ENABLEGNDVSXTALVCOLFCPPFDf32XTOPLLPAf4Power up / downVoltage monitor External

50ATAR862-8 4589B–4BMCU–02/03PWM Mode: Pulse-width modulation output on Timer 2 output pin (T2O)Figure 49. PWM Modulation Timer 2 Registers Timer 2

51ATAR862-84589B–4BMCU–02/03Timer 2 Mode Register 1 (T2M1)Address: "7"hex - Subaddress: "1"hexDuty Cycle Generator The duty cycl

52ATAR862-8 4589B–4BMCU–02/03Figure 50. DCG Output Signals Timer 2 Mode Register 2 (T2M2)Address: "7"hex - Subaddress: "2"hexI

53ATAR862-84589B–4BMCU–02/03Timer 2 Compare and Compare Mode RegistersTimer 2 has two separate compare registers, T2CO1 for the 4-bit stage and T2CO2

54ATAR862-8 4589B–4BMCU–02/03Timer 2 COmpare Register 2 (T2CO2) Byte WriteAddress: "7"hex - Subaddress: "5"hexTimer 3Features •

55ATAR862-84589B–4BMCU–02/03Timer 3 consists of an 8-bit up-counter with two compare registers and one capture reg-ister. The timer can be used as eve

56ATAR862-8 4589B–4BMCU–02/03Figure 52. Counter 3 Stage The status of the timer as well as the occurrence of a compare match or an edge detectof the

57ATAR862-84589B–4BMCU–02/03Figure 53. Counter Reset with Each Compare Match Figure 54. Counter Reset with Compare Register 2 and Toggle with Start

58ATAR862-8 4589B–4BMCU–02/03Figure 56. Externally Triggered Counter Reset and Start Combined with Single-actionMode Timer 3 – Mode 3: Timer/Counter

59ATAR862-84589B–4BMCU–02/03Timer 3 – Mode 7: Carrier Frequency Burst Modulation Controlled by SSI Internal Output (SO)The Timer 3 counter is driven b

6ATAR862-8 4589B–4BMCU–02/03General Description The fully-integrated PLL transmitter that allows particularly simple, low-cost RF minia-ture transmit

60ATAR862-8 4589B–4BMCU–02/03Timer 3 – Mode 10: Manchester Demodulation/ Pulse-width DemodulationFor Manchester demodulation, the edge detection stag

61ATAR862-84589B–4BMCU–02/03Timer 3 – Mode 12: Timer/Counter with External Capture Mode (T3I)The counter is driven by an internal clock source and an

62ATAR862-8 4589B–4BMCU–02/03Timer 3 RegistersTimer 3 Mode Register (T3M) Address: "B"hex - Subaddress: "0"hexNote: 1. In this mo

63ATAR862-84589B–4BMCU–02/03Timer 3 Control Register 1 (T3C) WritePrimary register address: "C"hex - WriteTimer 3 Status Register 1 (T3ST) R

64ATAR862-8 4589B–4BMCU–02/03Timer 3 Compare- and Compare-mode RegisterTimer 3 has two separate compare registers T3CO1 and T3CO2 for the 8-bit stage

65ATAR862-84589B–4BMCU–02/03Timer 3 Compare Mode Register 2 (T3CM2)Address: "B"hex - Subaddress: "3"hexT3CM2 contains the mask bit

66ATAR862-8 4589B–4BMCU–02/03Timer 3 Capture Register The counter content can be read via the capture register. There are two ways to use thecapture

67ATAR862-84589B–4BMCU–02/033. Timer/SSI combined modes – the SSI used together with Timer 2 or Timer 3 is capable of performing a variety of data mod

68ATAR862-8 4589B–4BMCU–02/03All directional control of the external data port used by the SSI is handled automaticallyand is dependent on the transm

69ATAR862-84589B–4BMCU–02/03In RX mode, as soon as the SSI is activated (SIR = 0), 8 shift clocks are generated andthe incoming serial data is shifted

7ATAR862-84589B–4BMCU–02/03Figure 4. Tolerances of Frequency Modulation Using C4=9.2pF ±2%, C5= 6.8 pF ±5%, a switch port with CSwitch= 3 pF ±10%, st

70ATAR862-8 4589B–4BMCU–02/03Figure 68. Example of 8-bit Synchronous Receive Operation 9-bit Shift Mode (MCL) In the 9-bit shift mode, the SSI is ab

71ATAR862-84589B–4BMCU–02/03Figure 69. Example of MCL Transmit Dialog Figure 70. Example of MCL Receive Dialog 8-bit Pseudo MCL Mode In this mode, t

72ATAR862-8 4589B–4BMCU–02/03MCL Bus Protocol The MCL protocol constitutes a simple 2-wire bi-directional communication highway viawhich devices can

73ATAR862-84589B–4BMCU–02/03Figure 72. MCL Bus Protocol 2 SSI Interrupt The SSI interrupt INT3 can be generated either by an SSI buffer register stat

74ATAR862-8 4589B–4BMCU–02/03Figure 73. Multi-chip Link Figure 74. SSI Output Masking Function Serial Interface RegistersSerial Interface Control R

75ATAR862-84589B–4BMCU–02/03• In Transmit mode (SDD = 1) shifting starts only if the transmit buffer has been loaded (SRDY = 1). • Setting SIR-bit loa

76ATAR862-8 4589B–4BMCU–02/03Serial Interface Status and Control Register (SISC)Primary register address: "A"hexSerial Transmit Buffer (STB

77ATAR862-84589B–4BMCU–02/03Combination Modes The UTCM consists of two timers (Timer 2 and Timer 3) and a serial interface. There isa multitude of mod

78ATAR862-8 4589B–4BMCU–02/03Combination Mode 1:Burst ModulationSSI mode 1: 8-bit NRZ and internal data SO output to the Timer 2 modulator stageTimer

79ATAR862-84589B–4BMCU–02/03Combination Mode 3: Manchester Modulation 1 SSI mode 1: 8-bit shift register internal data output (SO) to the Timer 2modul

8ATAR862-8 4589B–4BMCU–02/03Figure 5. Output Power Measurement Application Circuit For the supply-voltage blocking capacitor C3, a value of 68 nF/X7

80ATAR862-8 4589B–4BMCU–02/03Combination Mode 5: Biphase Modulation 2 SSI mode 1: 8-bit shift register internal data output (SO) to the Timer 2modula

81ATAR862-84589B–4BMCU–02/03Combination Mode Timer 3 and SSIFigure 81. Combination Timer 3 and SSI Combination Mode 6:FSK ModulationSSI mode 1: 8-bit

82ATAR862-8 4589B–4BMCU–02/03Figure 82. FSK Modulation Combination Mode 7: Pulse-width Modulation (PWM)SSI mode 1: 8-bit shift register internal dat

83ATAR862-84589B–4BMCU–02/03Before activating the demodulator mode the timer and the demodulator stage must besynchronized with the bitstream. The Man

84ATAR862-8 4589B–4BMCU–02/03Figure 85. Biphase Demodulation Combination Mode Timer 2 and Timer 3Figure 86. Combination Timer 3 and Timer 2 011 1 1

85ATAR862-84589B–4BMCU–02/03Combination Mode 10: Frequency Measurement or Event Counter with Time GateTimer 2 mode 1/2: 12-bit compare counter/8-bit c

86ATAR862-8 4589B–4BMCU–02/03Figure 89. Burst Modulation 1 0101234501012345010123450101 50101 50101 50101 50101 50101 50101 50101 50101 5010130 1 2

87ATAR862-84589B–4BMCU–02/03Combination Mode Timer 2, Timer 3 and SSIFigure 90. Combination Timer 2, Timer 3 and SSI 8-bit Counter 3RESCompare 3/1T3C

88ATAR862-8 4589B–4BMCU–02/03Combination Mode 12: Burst Modulation 2SSI mode 1: 8-bit shift register internal data output (SO) to the Timer 3 Timer 2

89ATAR862-84589B–4BMCU–02/03Figure 92. FSK Modulation Microcontroller Block The microcontroller block is a multichip device which offers a combinatio

9ATAR862-84589B–4BMCU–02/03Figure 6. ASK Application Circuit CLKPA_ENABLEANT2ANT1ENABLEGNDVSXTAL212223241234VCOLFCPPFDf32XTOPLLPAf4Power up/downC3VSC

90ATAR862-8 4589B–4BMCU–02/03Figure 94. Block Diagram EEPROM Serial Interface The U505M has a two-wire serial interface (TWI) to the microcontroller

91ATAR862-84589B–4BMCU–02/03Figure 95. MCL Protocol • Before the START condition and after the STOP condition the device is in standby mode and the S

92ATAR862-8 4589B–4BMCU–02/03Write Operations The EEPROM permits 8-bit and 16-bit write operations. A write access starts with theSTART condition fol

93ATAR862-84589B–4BMCU–02/03read access. If the memory address limit is reached, the data word address will roll overand the sequential read will cont

94ATAR862-8 4589B–4BMCU–02/03Note: Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This i

95ATAR862-84589B–4BMCU–02/03Note: The Pin BP20/NTE has a static pull-up resistor during the reset-phase of the microcontroller.Power-on Reset Threshol

96ATAR862-8 4589B–4BMCU–02/03AC CharacteristicsSupply Voltage VDD = 2.0 V to 4.0 V, VSS = 0 V, Tamb = 25°C unless otherwise specified.Parameters Test

97ATAR862-84589B–4BMCU–02/03Crystal CharacteristicsFigure 96. Crystal Equivalent Circuit 32-kHz Crystal Oscillator (Operating Range VDD = 2.0 V to 4.

98ATAR862-8 4589B–4BMCU–02/03 File: _____________________ . HEX CRC: ____________________ . HEXAproval Date: _________________ Signatu

99ATAR862-84589B–4BMCU–02/03Package Information Ordering InformationExtended Type Number Package RemarksATAR862M-xxxR4-TNQ SSO24 429 MHz to 439 MHztec