Rainbow-electronics T48C862-R4 User Manual

1Features• Single Package Fully-integrated 4-bit Flash Microcontroller with RF Transmitter• Low Power Consumption in Sleep Mode (< 1 µA Typically)•

10T48C862-R4 4551B–4BMCU–02/03Figure 7. FSK Application Circuit CLKPA_ENABLEANT2ANT1ENABLEGNDVSXTAL212223241234VCOLFCPPFDf32XTOPLLPAf4Power up/downC

100T48C862-R4 4551B–4BMCU–02/03Package InformationExtended Type Number Package RemarksT48C862M-TNQ SSO24 429 MHz to 439 MHztechnical drawingsaccordin

101T48C862-R44551B–4BMCU–02/03Table of Contents Features ...

102T48C862-R4 4551B–4BMCU–02/03Components of MARC4 Core ... 14Program Memory ...

103T48C862-R44551B–4BMCU–02/03Peripheral Modules ... 30Addressing Peripheral

104T48C862-R4 4551B–4BMCU–02/03Features ...54Tim

105T48C862-R44551B–4BMCU–02/03Serial Interface Control Register 2 (SIC2) ...76Serial Interface Statu

106T48C862-R4 4551B–4BMCU–02/03Thermal Resistance ... 95DC Operating Charact

Printed on recycled paper.© Atmel Corporation 2003.Atmel Corporation makes no warranty for the use of its products, other than those expressly contai

11T48C862-R44551B–4BMCU–02/03Figure 8. ESD Protection Circuit CLK PA_ENABLEANT2ANT1XTAL ENABLEVSGNDAbsolute Maximum RatingsParameters Symbol Min. Max

12T48C862-R4 4551B–4BMCU–02/03Output power variation for the full temperature rangeTamb = -40°C to +85°CVS = 3.0 VVS = 2.0 VDPRefDPRef-1.5-4.0dBdBOut

13T48C862-R44551B–4BMCU–02/03Microcontroller BlockFeatures• 4-Kbyte ROM, 256 x 4-bit RAM• EEPROM Programmable Options• Read Protection for the EEPROM

14T48C862-R4 4551B–4BMCU–02/03Reset Function During each reset (power-on or brown-out), the I/O configuration is deleted andreloaded with the data fr

15T48C862-R44551B–4BMCU–02/03The corresponding memory map is shown in Figure 4. Look-up tables of constants canalso be held in ROM and are accessed vi

16T48C862-R4 4551B–4BMCU–02/03Figure 11. RAM Map Registers The microcontroller has seven programmable registers and one condition code register(seeF

17T48C862-R44551B–4BMCU–02/03RAM Address Registers The RAM is addressed with the four 8-bit wide RAM address registers: SP, RP, X and Y.These register

18T48C862-R4 4551B–4BMCU–02/03ALU The 4-bit ALU performs all the arithmetic, logical, shift and rotate operations with the toptwo elements of the exp

19T48C862-R44551B–4BMCU–02/03Interrupt Processing For processing the eight interrupt levels, the microcontroller includes an interrupt con-troller wit

2T48C862-R4 4551B–4BMCU–02/03Pin ConfigurationFigure 2. Pinning SSO24 XTALVSGNDENABLENRESETBP63/T3IBP20/NTEBP23BP41/T2I/VMIBP42/T2OBP43/SD/INT3VSSAN

20T48C862-R4 4551B–4BMCU–02/03Table 1. Interrupt Priority Table 2. Hardware Interrupts Software Interrupts The programmer can generate interrupts b

21T48C862-R44551B–4BMCU–02/03Master Reset The master reset forces the CPU into a well-defined condition. It is unmaskable and isactivated independent

22T48C862-R4 4551B–4BMCU–02/03A power-on reset pulse is generated by a VDD rise across the default BOT voltage level(1.7 V). A brown-out reset pulse

23T48C862-R44551B–4BMCU–02/03Figure 17. Voltage Monitor Voltage Monitor Control/Status RegisterPrimary register address: "F"hexVM2: Voltage

24T48C862-R4 4551B–4BMCU–02/03Figure 18. Internal Supply Voltage Supervisor Figure 19. External Input Voltage Supervisor Clock GenerationClock Modu

25T48C862-R44551B–4BMCU–02/03Figure 20. Clock Module Table 3. Clock Modes The clock module generates two output clocks. One is the system clock (SYS

26T48C862-R4 4551B–4BMCU–02/03Figure 21. RC-oscillator 1 External Input Clock The OSC1 or OSC2 (mask option) can be driven by an external clock sour

27T48C862-R44551B–4BMCU–02/03Figure 23. RC-oscillator 2 4-MHz Oscillator The microcontroller block 4-MHz oscillator options need a crystal or ceramic

28T48C862-R4 4551B–4BMCU–02/03Figure 26. 32-kHz Crystal Oscillator Clock Management The clock management register controls the system clock divider

29T48C862-R44551B–4BMCU–02/03System Configuration Register (SC)Primary register address: "3"hexPower-down Modes The sleep mode is a shut-dow

3T48C862-R44551B–4BMCU–02/0321 CLK Clock output signal for microcontrollerThe clock output frequency is set by the crystal to fXTAL/4.22 PA_ENABLE Swi

30T48C862-R4 4551B–4BMCU–02/03active or stopped during the sleep mode. If the clock for the core and the peripherals isstopped, the selected oscillat

31T48C862-R44551B–4BMCU–02/03Figure 27. Example of I/O Addressing 12345Module ASWModule M1Module M2 Module M3Auxiliary SwitchModulePrimary Reg.(Addre

32T48C862-R4 4551B–4BMCU–02/03Table 5. Peripheral Addresses Port Address NameWrite/ Read Reset Value Register FunctionModuleTypeSeePage1 P1DAT W/R 1

33T48C862-R44551B–4BMCU–02/03Bi-directional Ports With the exception of Port 1 and Port 6, all other ports (2, 4 and 5) are 4 bits wide. Port 1and Por

34T48C862-R4 4551B–4BMCU–02/03Figure 28. Bi-directional Port 1 Bi-directional Port 2 As all other bi-directional ports, this port includes a bitwise

35T48C862-R44551B–4BMCU–02/03Port 2 Data Register (P2DAT) Primary register address: "2"hex* Bit 3 -> MSB, Bit 0 -> LSBPort 2 Control R

36T48C862-R4 4551B–4BMCU–02/03Figure 30. Bi-directional Port 5 Figure 31. Port 5 External Interrupts Port 5 Data Register (P5DAT) Primary register

37T48C862-R44551B–4BMCU–02/03Table 6. P5xM2, P5xM1 – Port 5x Interrupt Mode/Direction Code Bi-directional Port 4 The bi-directional Port 4 is a bitw

38T48C862-R4 4551B–4BMCU–02/03Port 4 Data Register (P4DAT) Primary register address: "4"hexPort 4 Control Register (P4CR) Byte WriteAuxilia

39T48C862-R44551B–4BMCU–02/03Port 6 Data Register (P6DAT) Primary register address: "6"hexPort 6 Control Register (P6CR) Auxiliary register

4T48C862-R4 4551B–4BMCU–02/03UHF ASK/FSK Transmitter BlockFeatures• Integrated PLL Loop Filter• ESD Protection (4 kV HBM/200 V MM, Except Pin 2: 4 kV

40T48C862-R4 4551B–4BMCU–02/03Figure 33. UTCM Block Diagram Timer 1 The Timer 1 is an interval timer which can be used to generate periodical interr

41T48C862-R44551B–4BMCU–02/03This timer starts running automatically after any power-on reset! If the watchdog func-tion is not activated, the timer c

42T48C862-R4 4551B–4BMCU–02/03Timer 1 Control Register 1 (T1C1)Address: "7"hex - Subaddress: "8"hex* Bit 3 -> MSB, Bit 0 ->

43T48C862-R44551B–4BMCU–02/03Timer 1 Control Register 2 (T1C2)Address: "7"hex - Subaddress: "9"hex* Bit 3 -> MSB, Bit 0 -> L

44T48C862-R4 4551B–4BMCU–02/03Timer 2 8-/12-bit Timer for:• Interrupt, square-wave, pulse and duty cycle generation • Baud-rate generation for the in

45T48C862-R44551B–4BMCU–02/03Figure 36. Timer 2 Timer 2 ModesMode 1: 12-bit Compare CounterThe 4-bit stage and the 8-bit stage work together as a 12-

46T48C862-R4 4551B–4BMCU–02/03The 4-bit stage is used as programmable prescaler for the 8-bit counter stage. In thismode, a duty cycle stage is also

47T48C862-R44551B–4BMCU–02/03Figure 40. Timer 2 Modulator Output Stage Timer 2 Output SignalsTimer 2 Output Mode 1 Toggle Mode A: A Timer 2 compare m

48T48C862-R4 4551B–4BMCU–02/03Toggle Mode C: A Timer 2 compare match toggles the output flip-flop (M2) -> T2OFigure 43. Pulse Generator – the Tim

49T48C862-R44551B–4BMCU–02/03Timer 2 Output Mode 4 Biphase Modulator: Timer 2 Modulates the SSI Internal Data Output (SO) to Biphase Code. Figure 46.

5T48C862-R44551B–4BMCU–02/03Figure 3. Block Diagram CLKPA_ENABLEANT2ANT1ENABLEGNDVSXTALVCOLFCPPFDf32XTOPLLPAf4Power up / downVoltage monitor External

50T48C862-R4 4551B–4BMCU–02/03PWM Mode: Pulse-width modulation output on Timer 2 output pin (T2O)Figure 48. PWM ModulationTimer 2 Registers Timer 2

51T48C862-R44551B–4BMCU–02/03Timer 2 Mode Register 1 (T2M1)Address: "7"hex - Subaddress: "1"hexDuty Cycle Generator The duty cycle

52T48C862-R4 4551B–4BMCU–02/03Figure 49. DCG Output SignalsTimer 2 Mode Register 2 (T2M2)Address: "7"hex - Subaddress: "2"hexIf

53T48C862-R44551B–4BMCU–02/03Timer 2 Compare and Compare Mode RegistersTimer 2 has two separate compare registers, T2CO1 for the 4-bit stage and T2CO2

54T48C862-R4 4551B–4BMCU–02/03Timer 2 COmpare Register 2 (T2CO2) Byte WriteAddress: "7"hex - Subaddress: "5"hexTimer 3Features •

55T48C862-R44551B–4BMCU–02/03Timer 3 consists of an 8-bit up-counter with two compare registers and one capture reg-ister. The timer can be used as ev

56T48C862-R4 4551B–4BMCU–02/03Figure 51. Counter 3 Stage The status of the timer as well as the occurrence of a compare match or an edge detectof th

57T48C862-R44551B–4BMCU–02/03Figure 52. Counter Reset with Each Compare Match Figure 53. Counter Reset with Compare Register 2 and Toggle with Start

58T48C862-R4 4551B–4BMCU–02/03Figure 55. Externally Triggered Counter Reset and Start Combined with Single-actionMode Timer 3 – Mode 3: Timer/Counte

59T48C862-R44551B–4BMCU–02/03Timer 3 – Mode 8: FSK Modulation with Shift Register Data (SO)The two compare registers are used for generating two diffe

6T48C862-R4 4551B–4BMCU–02/03General Description The fully-integrated PLL transmitter that allows particularly simple, low-cost RF minia-ture transmi

60T48C862-R4 4551B–4BMCU–02/03Figure 59. Manchester Demodulation Timer 3 – Mode 11: Biphase DemodulationIn the Biphase demodulation mode, the timer

61T48C862-R44551B–4BMCU–02/03Timer 3 – Mode 12: Timer/Counter with External Capture Mode (T3I)The counter is driven by an internal clock source and an

62T48C862-R4 4551B–4BMCU–02/03Timer 3 RegistersTimer 3 Mode Register (T3M) Address: "B"hex - Subaddress: "0"hexNote: 1. In this m

63T48C862-R44551B–4BMCU–02/03Timer 3 Control Register 1 (T3C) WritePrimary register address: "C"hex - WriteTimer 3 Status Register 1 (T3ST)

64T48C862-R4 4551B–4BMCU–02/03Timer 3 Compare- and Compare-mode RegisterTimer 3 has two separate compare registers T3CO1 and T3CO2 for the 8-bit stag

65T48C862-R44551B–4BMCU–02/03Timer 3 Compare Mode Register 2 (T3CM2)Address: "B"hex - Subaddress: "3"hexT3CM2 contains the mask bi

66T48C862-R4 4551B–4BMCU–02/03Timer 3 Capture Register The counter content can be read via the capture register. There are two ways to use thecapture

67T48C862-R44551B–4BMCU–02/03SSI Peripheral Configuration The synchronous serial interface (SSI) can be used either for serial communication withexter

68T48C862-R4 4551B–4BMCU–02/03General SSI Operation The SSI is comprised essentially of an 8-bit shift register with two associated 8-bit buff-ers –

69T48C862-R44551B–4BMCU–02/038-bit Synchronous Mode Figure 65. 8-bit Synchronous Mode In the 8-bit synchronous mode, the SSI can operate as either a

7T48C862-R44551B–4BMCU–02/03Figure 4. Tolerances of Frequency Modulation Using C4=9.2pF ±2%, C5= 6.8 pF ±5%, a switch port with CSwitch= 3 pF ±10%, s

70T48C862-R4 4551B–4BMCU–02/03Figure 66. Example of 8-bit Synchronous Transmit Operation Figure 67. Example of 8-bit Synchronous Receive Operation

71T48C862-R44551B–4BMCU–02/03Before activating the SSI (SIR = 0) and commencing an MCL dialog, the appropriatedata direction for the first word must b

72T48C862-R4 4551B–4BMCU–02/03Figure 69. Example of MCL Receive Dialog 8-bit Pseudo MCL Mode In this mode, the SSI exhibits all the typical MCL oper

73T48C862-R44551B–4BMCU–02/03MCL Bus Protocol The MCL protocol constitutes a simple 2-wire bi-directional communication highway viawhich devices can c

74T48C862-R4 4551B–4BMCU–02/03Figure 71. MCL Bus Protocol 2 SSI Interrupt The SSI interrupt INT3 can be generated either by an SSI buffer register s

75T48C862-R44551B–4BMCU–02/03Figure 72. SSI Output Masking Function Serial Interface RegistersSerial Interface Control Register 1 (SIC1)Auxiliary reg

76T48C862-R4 4551B–4BMCU–02/03Serial Interface Control Register 2 (SIC2)Auxiliary register address: "A"hexNote: SDD controls port direction

77T48C862-R44551B–4BMCU–02/03Serial Interface Status and Control Register (SISC)Primary register address: "A"hexSerial Transmit Buffer (STB)

78T48C862-R4 4551B–4BMCU–02/03Combination Modes The UTCM consists of two timers (Timer 2 and Timer 3) and a serial interface. There isa multitude of

79T48C862-R44551B–4BMCU–02/03Combination Mode 1:Burst ModulationSSI mode 1: 8-bit NRZ and internal data SO output to the Timer 2 modulator stageTimer

8T48C862-R4 4551B–4BMCU–02/03Figure 5. Output Power Measurement Application Circuit For the supply-voltage blocking capacitor C3, a value of 68 nF/X

80T48C862-R4 4551B–4BMCU–02/03Combination Mode 3: Manchester Modulation 1 SSI mode 1: 8-bit shift register internal data output (SO) to the Timer 2mo

81T48C862-R44551B–4BMCU–02/03Combination Mode 5: Biphase Modulation 2 SSI mode 1: 8-bit shift register internal data output (SO) to the Timer 2modulat

82T48C862-R4 4551B–4BMCU–02/03Combination Mode Timer 3 and SSIFigure 79. Combination Timer 3 and SSI Combination Mode 6:FSK ModulationSSI mode 1: 8-

83T48C862-R44551B–4BMCU–02/03Figure 80. FSK Modulation Combination Mode 7: Pulse-width Modulation (PWM)SSI mode 1: 8-bit shift register internal data

84T48C862-R4 4551B–4BMCU–02/03Before activating the demodulator mode the timer and the demodulator stage must besynchronized with the bitstream. The

85T48C862-R44551B–4BMCU–02/03Figure 83. Biphase Demodulation Combination Mode Timer 2 and Timer 3Figure 84. Combination Timer 3 and Timer 2 011 1 10

86T48C862-R4 4551B–4BMCU–02/03Combination Mode 10: Frequency Measurement or Event Counter with Time GateTimer 2 mode 1/2: 12-bit compare counter/8-bi

87T48C862-R44551B–4BMCU–02/03Figure 87. Burst Modulation 1 0101234501012345010123450101 50101 50101 50101 50101 50101 50101 50101 50101 5010130 1 2 3

88T48C862-R4 4551B–4BMCU–02/03Combination Mode Timer 2, Timer 3 and SSIFigure 88. Combination Timer 2, Timer 3 and SSI 8-bit Counter 3RESCompare 3/1

89T48C862-R44551B–4BMCU–02/03Combination Mode 12: Burst Modulation 2SSI mode 1: 8-bit shift register internal data output (SO) to the Timer 3 Timer 2

9T48C862-R44551B–4BMCU–02/03Figure 6. ASK Application Circuit CLKPA_ENABLEANT2ANT1ENABLEGNDVSXTAL212223241234VCOLFCPPFDf32XTOPLLPAf4Power up/downC3VS

90T48C862-R4 4551B–4BMCU–02/03Figure 90. FSK Modulation Data EEPROM The internal data EEPROM offers 2 pages of 512 bits each. Both pages are organiz

91T48C862-R44551B–4BMCU–02/03Serial Interface The EEPROM uses a two-wire serial interface (TWI) to the microcontroller for read andwrite accesses to t

92T48C862-R4 4551B–4BMCU–02/03Control Byte Format EEPROM The EEPROM has a size of 2 ´ 512 bits and is organized as 32 x 16-bit matrix each. Toread an

93T48C862-R44551B–4BMCU–02/03Write Control BytesA -> acknowledge; HB: high byte; LB: low byte; R: row addressRead Operations The EEPROM allows byte

94T48C862-R4 4551B–4BMCU–02/03A -> acknowledge, N -> no acknowledge; HB: high byte; LB: low byte, R: row addressInitialization the Serial Inter

95T48C862-R44551B–4BMCU–02/03Note: Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This is

96T48C862-R4 4551B–4BMCU–02/03Note: The Pin BP20/NTE has a static pull-up resistor during the reset-phase of the microcontrollerPower-on Reset Thresh

97T48C862-R44551B–4BMCU–02/03AC CharacteristicsSupply voltage VDD = 2.0 to 4.0 V, VSS = 0 V, Tamb = 25°C unless otherwise specified.Parameters Test Co

98T48C862-R4 4551B–4BMCU–02/03Crystal CharacteristicsFigure 93. Crystal Equivalent Circuit 32-kHz Crystal Oscillator (Operating Range VDD = 2.0 V to

99T48C862-R44551B–4BMCU–02/03 File: _____________________ . HEX CRC: ____________________ . HEXApproval Date: _________________ Signatu