Rainbow-electronics DS1842A User Manual

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General Description
The DS1842A integrates the discrete high-voltage
components necessary for avalanche photodiode
(APD) bias and monitor applications. A switch FET and
precision voltage-divider network are used in conjunc-
tion with an external DC-DC controller to create a boost
DC-DC converter. A current clamp limits current
through the APD and also features an external shut-
down. The precision voltage-divider network is provid-
ed for precise control of the APD bias voltage. The
device also includes a dual current mirror to monitor
the APD current.
Applications
APD Biasing
GPON ONU and OLT
Features
76V Maximum Boost Voltage
Switch FET
Current Monitor with a Wide 1µA to 2mA Range,
Fast 50ns Time Constant, and 10:1 and 5:1 Ratio
2mA Current Clamp with External Shutdown
Precision Voltage Feedback
Multiple External Filtering Options
3mm x 3mm, 14-Pin TDFN Package with Exposed Pad
DS1842A
76V, APD, Bias Output Stage with
Current Monitoring
________________________________________________________________
Maxim Integrated Products
1
Ordering Information
19-4994; Rev 0; 10/09
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT
AVAILABLE
PART TEMP RANGE PIN-PACKAGE
DS1842AN+ -40°C to +8C 14 TDFN-EP*
DS1842AN+T&R -40°C to +8C 14 TDFN-EP*
+
Denotes a lead(Pb)-free/RoHS-compliant package.
T&R = Tape and reel.
*
EP = Exposed pad.
DS1875
DS1842A
SW
FB
D2
COMP
MON3
LX
GATE
PGND
FBOUT
R
1
R
2
MIRIN
FBIN
MIR1
CLAMP
NOTE: SEE THE LAYOUT CONSIDERATIONS SECTION.
MIROUTGNDEP
3.3V
CURRENT MIRROR
CURRENT
LIMIT
MIR2
C
BULK
C
COMP
R
COMP
EXTERNAL MONITOR
TIA
APD
ROSA
Typical Application Circuit
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Summary of Contents

Page 1 - Current Monitoring

General DescriptionThe DS1842A integrates the discrete high-voltagecomponents necessary for avalanche photodiode(APD) bias and monitor applications. A

Page 2

DS1842A76V, APD, Bias Output Stage withCurrent Monitoring2 _______________________________________________________________________________________ABSO

Page 3

DS1842A76V, APD, Bias Output Stage withCurrent Monitoring_______________________________________________________________________________________3Typic

Page 4

DS1842A76V, APD, Bias Output Stage withCurrent Monitoring4 _______________________________________________________________________________________Typi

Page 5

DS1842A76V, APD, Bias Output Stage withCurrent Monitoring_______________________________________________________________________________________ 5Pin

Page 6

The mirror output is typically connected to an ADCusing a resistor to convert the mirrored current into avoltage. The resistor to ground should be sel

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