Rainbow-electronics W49F002U User Manual

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W49F002U
256K × 8 CMOS FLASH MEMORY
Publication Release Date: April 2000
- 1 - Revision A2
GENERAL DESCRIPTION
The W49F002U is a 2-megabit, 5-volt only CMOS flash memory organized as 256K
×
8 bits. The
device can be programmed and erased in-system with a standard 5V power supply. A 12-volt V
PP
is
not required. The unique cell architecture of the W49F002U results in fast program/erase operations
with extremely low current consumption (compared to other comparable 5-volt flash memory
products). The device can also be programmed and erased using standard EPROM programmers.
FEATURES
Single 5-volt operations:
5-volt Read
5-volt Erase
5-volt Program
Fast Program operation:
Byte-by-Byte programming: 35 µS (typ.)
Fast Erase operation: 100 mS (typ.)
Fast Read access time: 70/90/120 nS
Endurance: 10K cycles (typ.)
Ten-year data retention
Hardware data protection
One 16K byte Boot Block with Lockout
protection
Two 8K byte Parameter Blocks
Two Main Memory Blocks (96K, 128K) Bytes
Low power consumption
Active current: 25 mA (typ.)
Standby current: 20
µ
A (typ.)
Automatic program and erase timing with
internal V
PP
generation
End of program or erase detection
Toggle bit
Data polling
Latched address and data
TTL compatible I/O
JEDEC standard byte-wide pinouts
Available packages: 32-pin DIP and 32-pin
TSOP and 32-pin-PLCC
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Summary of Contents

Page 1 - 256K × 8 CMOS FLASH MEMORY

W49F002U 256K × 8 CMOS FLASH MEMORY Publication Release Date: April 2000 - 1 - Revision A2 GENERAL DESCRIPTION The W49F002U is a 2-megabit, 5-vo

Page 2

W49F002U - 10 - Command Codes for Product Identification and Boot Block Lockout Detection BYTE SEQUENCE SOFTWARE PRODUCT IDENTIFICATION/BOOT BLOCK L

Page 3

W49F002U Publication Release Date: April 2000 - 11 - Revision A2 Command Codes for Boot Block Lockout Enable BYTE SEQUENCE ADDRESS DATA 0 Wr

Page 4

W49F002U - 12 - DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER RATING UNIT Power Supply Voltage to Vss Potential -0.5 to +7.0 V Operating T

Page 5

W49F002U Publication Release Date: April 2000 - 13 - Revision A2 Power-up Timing PARAMETER SYMBOL TYPICAL UNIT Power-up to Read Operation TPU

Page 6

W49F002U - 14 - AC Characteristics, continued Read Cycle Timing Parameters (VCC = 5.0V ±10%, VCC = 0V, TA = 0 to 70° C) PARAMETER SYM. W49F002U-70 W

Page 7

W49F002U Publication Release Date: April 2000 - 15 - Revision A2 AC Characteristics, continued Data Polling and Toggle Bit Timing Parameters P

Page 8

W49F002U - 16 - Timing Waveforms, continued WE Controlled Command Write Cycle Timing Diagram Address A17-0DQ7-0Data ValidCEOEWETASTCSTOESTAHTCHTOEH

Page 9

W49F002U Publication Release Date: April 2000 - 17 - Revision A2 Timing Waveforms, continued Program Cycle Timing Diagram Address A17-0Byte 0

Page 10

W49F002U - 18 - Timing Waveforms, continued Toggle Bit Timing Diagram Address A17-0DQ6 CEOEWETOEH TOESTBP orTEC Boot Block Lockout Enable Timing Dia

Page 11

W49F002U Publication Release Date: April 2000 - 19 - Revision A2 Timing Waveforms, continued Chip Erase Timing Diagram SB2SB1 SB0Address A17-0

Page 12

W49F002U - 2 - PIN CONFIGURATIONS 1234567891011121314151632313029282726252423222120191817DQ0DQ1DQ2GNDA7A6A5A4A3A2A1A0A16A15A12VWEA14A13A8A9A11OEA10

Page 13

W49F002U - 20 - ORDERING INFORMATION PART NO. ACCESS TIME (nS) POWER SUPPLY CURRENT MAX. (mA) STANDBY VDD CURRENT MAX. (µA) PACKAGE CYCLE W4

Page 14

W49F002U Publication Release Date: April 2000 - 21 - Revision A2 PACKAGE DIMENSIONS 32-pin P-DIP 1.Dimensions D Max. & S include mold flas

Page 15

W49F002U - 22 - Package Dimensions, continued 32-pin TSOP AAA21LL1YcEHDDbeM0.10(0.004)θMin. Nom.Max.Min. Nom.Max.SymbolAAbcDEeLLY112AHD Note:Contr

Page 16

W49F002U Publication Release Date: April 2000 - 23 - Revision A2 VERSION HISTORY VERSION DATE PAGE DESCRIPTION A1 Nov. 1999 - Renamed fro

Page 17

W49F002U Publication Release Date: April 2000 - 3 - Revision A2 FUNCTIONAL DESCRIPTION Read Mode The read operation of the W49F002U is control

Page 18

W49F002U - 4 - operation if the boot block programming lockout feature is not activated. Once the boot block lockout feature is activated, the whol

Page 19

W49F002U Publication Release Date: April 2000 - 5 - Revision A2 Toggle Bit (DQ6)- Write Status Detection In addition to data polling, the W49F

Page 20

W49F002U - 6 - TABLE OF COMMAND DEFINITION(1) COMMAND NO. OF 1ST CYCLE 2ND CYCLE 3RD CYCLE 4TH CYCLE 5TH CYCLE 6TH CYCLE DESCRIPTION Cycles Addr

Page 21

W49F002U Publication Release Date: April 2000 - 7 - Revision A2 Command Codes for Byte Program COMMAND SEQUENCE ADDRESS DATA 0 Write 5555H

Page 22

W49F002U - 8 - Command Codes for Chip Erase BYTE SEQUENCE ADDRESS DATA 1 Write 5555H AAH 2 Write 2AAAH 55H 3 Write 5555H 80H 4 Wr

Page 23

W49F002U Publication Release Date: April 2000 - 9 - Revision A2 Command Codes for Sector Erase BYTE SEQUENCE ADDRESS DATA 1 Write 5555H A

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