Features• Supply Voltage up to 40V• Operating Voltage VS = 5V to 27V• Typically 10 µA Supply Current During Sleep Mode• Typically 40 µA Supply Current
109165A–AUTO–11/09ATA6629/ATA66314.4 Sleep or Silent Mode: Behavior at a Floating LIN-bus or a Short Circuited LIN to GNDIn Sleep or in Silent Mode th
119165A–AUTO–11/09ATA6629/ATA6631Figure 4-7. Short Circuit to GND on the LIN bus During Sleep- or Silent Mode 4.5 Fail-safe ModeThe device automatical
129165A–AUTO–11/09ATA6629/ATA6631A wake-up event from either Silent or Sleep Mode will be signalled to the microcontroller usingthe two pins RXD and T
139165A–AUTO–11/09ATA6629/ATA66315. Fail-safe Features• During a short-circuit at LIN to VBattery, the output limits the output current to IBUS_LIM. D
149165A–AUTO–11/09ATA6629/ATA66316. Voltage RegulatorFigure 6-1. VCC Voltage Regulator: Ramp Up and Undervoltage The voltage regulator needs an extern
159165A–AUTO–11/09ATA6629/ATA6631Figure 6-2. Power Dissipation: Save Operating Area versus VCC Output Current and Supply Voltage VS at Different Ambie
169165A–AUTO–11/09ATA6629/ATA66317. Absolute Maximum RatingsStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage t
179165A–AUTO–11/09ATA6629/ATA66319. Electrical Characteristics5V < VS < 27V, –40°C < Tj < 150°C; unless otherwise specified all values ref
189165A–AUTO–11/09ATA6629/ATA66313.4High level leakage currentVTXD=VCCTXD ITXD–3 +3 µA A3.5Low level output sink current at local wake-up requestFail-
199165A–AUTO–11/09ATA6629/ATA66316.12Ramp up time VS > 4V to VCC = 3.3VCVCC = 2.2 µFIload = –5 mA at VCCVCC tVCC100 250 µs A7 VCC Voltage Regulator
29165A–AUTO–11/09ATA6629/ATA6631Figure 1-1. Block Diagram 2. Pin ConfigurationFigure 2-1. Pinning SO8 3GND2EN6TXD5RXDVCC8NRES7Short-circuit andovertem
209165A–AUTO–11/09ATA6629/ATA66318.8LIN current limitationVBUS = VBatt_maxLIN IBUS_LIM40 120 200 mA A8.9Input leakage current at the receiver includin
219165A–AUTO–11/09ATA6629/ATA663110.4TXD dominant time out timerVTXD = 0V TXD tdom27 55 70 ms A10.5Monitoring time for wake-up over LIN busLIN tmon610
229165A–AUTO–11/09ATA6629/ATA6631Figure 9-1. Definition of Bus Timing Characteristics TXD(Input to transmitting node)VS(Transceiver supplyof transmitt
239165A–AUTO–11/09ATA6629/ATA6631Figure 9-2. Application Circuit 3GND2EN6TXD5RXDVCC+100 nF100 nF220 pF10 kΩ10 µF22 µF8NRES7Short circuit andovertemper
249165A–AUTO–11/09ATA6629/ATA663111. Package Information10. Ordering InformationExtended Type Number Package RemarksATA6629-TAPY SO8 3.3V LIN system b
9165A–AUTO–11/09Headquarters InternationalAtmel Corporation2325 Orchard ParkwaySan Jose, CA 95131USATel: 1(408) 441-0311Fax: 1(408) 487-2600Atmel Asia
39165A–AUTO–11/09ATA6629/ATA66313. Functional Description3.1 Physical Layer CompatibilitySince the LIN physical layer is independent from higher LIN l
49165A–AUTO–11/09ATA6629/ATA66313.7 Input/Output (TXD)In Normal Mode the TXD pin is the microcontroller interface to control the state of the LIN outp
59165A–AUTO–11/09ATA6629/ATA66314. Mode of OperationFigure 4-1. Mode of Operation Unpowered Mode(See section 4.5)a: VS > VSthFb: VS < VSthUc: Bu
69165A–AUTO–11/09ATA6629/ATA66314.1 Normal ModeThis is the normal transmitting and receiving mode of the LIN Interface, in accordance with LINspecific
79165A–AUTO–11/09ATA6629/ATA6631A voltage less than the LIN Pre-wake detection VLINL at pin LIN activates the internal LINreceiver and starts the wake
89165A–AUTO–11/09ATA6629/ATA66314.3 Sleep ModeA falling edge at EN while TXD is low switches the IC into Sleep Mode. The TXD Signal has tobe logic low
99165A–AUTO–11/09ATA6629/ATA6631A voltage less than the LIN Pre-wake detection VLINL at pin LIN activates the internal LINreceiver and starts the wake
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