Rainbow-electronics ATF1502ASV User Manual

1Features• High-density, High-performance, Electrically-erasable Complex ProgrammableLogic Device– 3.0 to 3.6V Operating Range– 32 Macrocells– 5 Produ

10ATF1502ASV1615G–PLD–09/02Power-down Mode The ATF1502ASV includes an optional pin-controlled power-down feature. When thismode is enabled, the PD pin

11ATF1502ASV1615G–PLD–09/02Notes: 1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec.2.

12ATF1502ASV1615G–PLD–09/02Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. The OGI pin (hig

13ATF1502ASV1615G–PLD–09/02AC Characteristics(1)Symbol Parameter-15 -20UnitsMin Max Min MaxtPD1Input or Feedback to Non-registered Output 3 15 20 nstP

14ATF1502ASV1615G–PLD–09/02Note: 1. See ordering information for valid part numbers.tZX3Output Buffer Enable Delay(Slow slew rate = ON;VCCIO= 5.0V/3.3

15ATF1502ASV1615G–PLD–09/02SUPPLY CURRENT VS. SUPPLY VOLTAGEASV VERSION (TA= 25°C, F = 0)0102030405060703 3.1 3.2 3.3 3.4 3.5 3.6VCC(V)ICC(mA)STANDARD

16ATF1502ASV1615G–PLD–09/02OUTPUT SOURCE CURRENT VS. OUTPUT VOLTAGE(VCC=3.3V,TA=25°C)-70-60-50-40-30-20-100100.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0OUTPUT

17ATF1502ASV1615G–PLD–09/02OE (1, 2) Global OE pinsGCLR Global Clear pinGCLK (1, 2, 3) Global Clock pinsPD (1, 2) Power-down pinsTDI, TMS, TCK,TDO JTA

18ATF1502ASV1615G–PLD–09/02ATF1502ASV I/O PinoutsMC PLC 44-lead PLCC 44-lead TQFP1A4422A5433A6444/TDI A 7 15A8 26A937/PD1 A1158 A1269/TMS A13710 A 148

19ATF1502ASV1615G–PLD–09/02Note: 1. Shaded area indicates preliminary data.Using “C” Product for IndustrialThere is very little risk in using “C” devi

2ATF1502ASV1615G–PLD–09/0244-lead TQFPTop View44-lead PLCCTop ViewDescription The ATF1502ASV is a high-performance, high-density complex programmable

20ATF1502ASV1615G–PLD–09/02Packaging Information44A – TQFP 2325 Orchard Parkway San Jose, CA 95131TITLEDRAWING NO.RREV. 44A, 44-lead, 10 x 10 mm B

21ATF1502ASV1615G–PLD–09/0244J–PLCCNotes: 1. This package conforms to JEDEC reference MS-018, Variation AC.2. Dimensions D1 and E1 do not include mold

Printed on recycledpaper.1615G–PLD–09/02 xM© Atmel Corporation 2002.Atmel Corporation makes no warranty for the use of its products, other than those

3ATF1502ASV1615G–PLD–09/02Block DiagramEach of the 32 macrocells generates a buried feedback that goes to the global bus.Each input and I/O pin also f

4ATF1502ASV1615G–PLD–09/02Boundary-scan Description Language (BSDL). ISP allows the device to be programmedwithout removing it from the printed circui

5ATF1502ASV1615G–PLD–09/02Flip-flop The ATF1502ASV’s flip-flop has very flexible data and control functions. The data inputcancomefromeithertheXOR gat

6ATF1502ASV1615G–PLD–09/02Input DiagramI/O DiagramSpeed/PowerManagementThe ATF1502ASV has several built-in speed and power management features.To furt

7ATF1502ASV1615G–PLD–09/02All power-down AC characteristic parameters are computed from external input or I/Opins, with reduced-power bit turned on. F

8ATF1502ASV1615G–PLD–09/02When using the ISP hardware or software to program the ATF1502ASV devices, fourI/O pins must be reserved for the JTAG interf

9ATF1502ASV1615G–PLD–09/02BSC Configurationfor Input and I/O Pins(Except JTAG TAPPins)Note: The ATF1502ASV has a pull-up option on TMS and TDI pins. T