Rainbow-electronics AT49LV001NT User Manual

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1
Features
Single Supply for Read and Write: 2.7 to 3.6V (BV), 3.0 to 3.6V (LV)
Fast Read Access Time - 70 ns
Internal Program Control and Timer
Sector Architecture
One 16K Byte Boot Block with Programming Lockout
Two 8K Byte Parameter Blocks
Two Main Memory Blocks (32K, 64K Bytes)
Fast Erase Cycle Time - 10 seconds
Byte-by-byte Programming - 30 µs/Byte Typical
Hardware Data Protection
DATA Polling For End Of Program Detection
Low Power Dissipation
25 mA Active Current
50 µA CMOS Standby Current
Typical 10,000 Write Cycles
Description
The AT49BV/LV001(N)(T) is a 3-volt-only in-system reprogrammable Flash memory.
Its 1 megabit of memory is organized as 131,072 words by 8 bits. Manufactured with
Atmels advanced nonvolatile CMOS technology, the device offers access times to
70 ns with power dissipation of just 90 mW over the commercial temperature range.
When the device is deselected, the CMOS standby current is less than 50 µA. For the
1-megabit
(128K x 8)
Single 2.7-volt
Battery-Voltage
Flash Memory
AT49BV001
AT49LV001
AT49BV001N
AT49LV001N
AT49BV001T
AT49LV001T
AT49BV001NT
AT49LV001NT
Rev. 1110B08/99
Pin Configurations
Pin Name Function
A0 - A16 Addresses
CE
Chip Enable
OE
Output Enable
WE Write Enable
RESET
RESET
I/O0 - I/O7 Data Inputs/Outputs
DC Dont Connect
NC No Connect
DIP Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
*RESET
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
VCC
WE
NC
A14
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
PLCC Top View
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
A14
A13
A8
A9
A11
OE
A10
CE
I/O7
4
3
2
1
32
31
30
14
15
16
17
18
19
20
I/O1
I/O2
GND
I/O3
I/O4
I/O5
I/O6
A12
A15
A16
RESET*
VCC
WE
NC
(continued)
VSOP Top View (8 x 14mm) or
TSOP Top View (8 x 20mm)
Type 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A11
A9
A8
A13
A14
NC
WE
VCC
*RESET
A16
A15
A12
A7
A6
A5
A4
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
*Note: This pin is a DC on the AT49BV001N(T) and AT49LV001N(T).
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Summary of Contents

Page 1 - Pin Configurations

1Features • Single Supply for Read and Write: 2.7 to 3.6V (BV), 3.0 to 3.6V (LV)• Fast Read Access Time - 70 ns • Internal Program Control and Timer •

Page 2

AT49BV/LV001(N)(T)10Notes: 1. These parameters are characterized and not 100% tested.2. See tOE spec in AC Read Characteristics.DATA Polling Waveforms

Page 3

AT49BV/LV001(N)(T)11Software ProductIdentification Entry(1)Software ProductIdentification Exit(1)Notes for software product identification1. Data Form

Page 4

AT49BV/LV001(N)(T)12AT49BV001 Ordering InformationtACC(ns)ICC (mA)Ordering Code Package Operation RangeActive Standby90 50 0.1 AT49BV001-90JCAT49BV001

Page 5

AT49BV/LV001(N)(T)13AT49LV001 Ordering InformationtACC(ns)ICC (mA)Ordering Code Package Operation RangeActive Standby70 50 0.1 AT49LV001-70JCAT49LV001

Page 6

AT49BV/LV001(N)(T)14AT49BV001N Ordering InformationtACC(ns)ICC (mA)Ordering Code Package Operation RangeActive Standby90 50 0.1 AT49BV001N-90JCAT49BV0

Page 7

AT49BV/LV001(N)(T)15AT49LV001N Ordering InformationtACC(ns)ICC (mA)Ordering Code Package Operation RangeActive Standby70 50 0.1 AT49LV001N-70JCAT49LV0

Page 8

AT49BV/LV001(N)(T)16AT49BV001T Ordering InformationtACC(ns)ICC (mA)Ordering Code Package Operation RangeActive Standby90 50 0.1 AT49BV001T-90JCAT49BV0

Page 9

AT49BV/LV001(N)(T)17AT49LV001T Ordering InformationtACC(ns)ICC (mA)Ordering Code Package Operation RangeActive Standby70 50 0.1 AT49LV001T-70JCAT49LV0

Page 10 - AT49BV/LV001(N)(T)

AT49BV/LV001(N)(T)18AT49BV001NT Ordering InformationtACC(ns) ICC (mA) Ordering Code Package Operation Range90 50 0.1 AT49BV001NT-90JCAT49BV001NT-90PCA

Page 11

AT49BV/LV001(N)(T)19AT49LV001NT Ordering InformationtACC(ns) ICC (mA) Ordering Code Package Operation Range70 50 0.1 AT49LV001NT-70JCAT49LV001NT-70PCA

Page 12

AT49BV/LV001(N)(T)2AT49BV/LV001N(T) pin 1 for the DIP and PLCC packagesand pin 9 for the TSOP package are don’t connect pins.To allow for simple in-sy

Page 13

AT49BV/LV001(N)(T)20Packaging Information.045(1.14) X 45˚PIN NO. 1IDENTIFY.025(.635) X 30˚ - 45˚.012(.305).008(.203).021(.533).013(.330).530(13.5).490

Page 14

© Atmel Corporation 1999.Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standa

Page 15

AT49BV/LV001(N)(T)3Device OperationREAD: The AT49BV/LV001(N)(T) is accessed like anEPROM. When CE and OE are low and WE is high, thedata stored at the

Page 16

AT49BV/LV001(N)(T)4Once the feature is enabled, the data in the boot block canno longer be erased or programmed with input voltage levelof 5.5V or les

Page 17

AT49BV/LV001(N)(T)5Notes: 1. The DATA FORMAT in each bus cycle is as follows: I/O7 - I/O0 (Hex)2. The 16K byte boot sector has the address range 00000

Page 18

AT49BV/LV001(N)(T)6Notes: 1. X can be VIL or VIH.2. Refer to AC Programming Waveforms.3. VH = 12.0V ± 0.5V.4. Manufacturer Code: 1FH, Device Code: 05H

Page 19

AT49BV/LV001(N)(T)7AC Read Waveforms (1)(2)(3)(4)Notes: 1. CE may be delayed up to tACC - tCE after the address transition without impact on tACC.2. O

Page 20 - Packaging Information

AT49BV/LV001(N)(T)8AC Byte Load WaveformsWE ControlledCE ControlledAC Byte Load CharacteristicsSymbol Parameter Min Max UnitstAS, tOESAddress, OE Set-

Page 21 - 1110B–08/99/xM

AT49BV/LV001(N)(T)9Program Cycle WaveformsSector or Chip Erase Cycle WaveformsNotes: 1. OE must be high only when WE and CE are both low.2. For chip e

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