Preliminary W49F020 256K × 8 CMOS FLASH MEMORY Publication Release Date: October 1999 - 1 - Revision A1 GENERAL DESCRIPTION The W49F020 is a 2-m
Preliminary W49F020 - 10 - DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER RATING UNIT Power Supply Voltage to Vss Potential -0.5 to +7.0 V
Preliminary W49F020 Publication Release Date: October 1999 - 11 - Revision A1 Power-up Timing PARAMETER SYMBOL TYPICAL UNIT Power-up to Rea
Preliminary W49F020 - 12 - AC Characteristics, continued Read Cycle Timing Parameters (VCC = 5.0V ±10%, VCC = 0V, TA = 0 to 70° C) PARAMETER SYM.
Preliminary W49F020 Publication Release Date: October 1999 - 13 - Revision A1 AC Characteristics, continued Data Polling and Toggle Bit Timi
Preliminary W49F020 - 14 - Timing Waveforms, continued WE Controlled Command Write Cycle Timing Diagram Address A17-0DQ7-0Data ValidCEOEWETASTCSTO
Preliminary W49F020 Publication Release Date: October 1999 - 15 - Revision A1 Timing Waveforms, continued Program Cycle Timing Diagram Addr
Preliminary W49F020 - 16 - Timing Waveforms, continued Toggle Bit Timing Diagram Address A17-0DQ6 CEOEWETOEHTOESTBP orTEC Boot Block Lockout Enabl
Preliminary W49F020 Publication Release Date: October 1999 - 17 - Revision A1 Timing Waveforms, continued Chip Erase Timing Diagram SB2SB1 S
Preliminary W49F020 - 18 - ORDERING INFORMATION PART NO. ACCESS TIME (nS) POWER SUPPLY CURRENT MAX. (mA) STANDBY VDD CURRENT MAX. (µA) PACK
Preliminary W49F020 Publication Release Date: October 1999 - 19 - Revision A1 PACKAGE DIMENSIONS 32-pin P-DIP 1.Dimensions D Max. & S in
Preliminary W49F020 - 2 - PIN CONFIGURATIONS 1234567891011121314151632313029282726252423222120191817DQ0DQ1DQ2GNDA7A6A5A4A3A2A1A0A16A15A12VWEA14A13A
Preliminary W49F020 - 20 - Package Dimensions, continued 32-pin TSOP AAA21LL1YcEHDDbeM0.10(0.004)θMin. Nom.Max.Min. Nom.Max.SymbolAAbcDEeLLY112AHD
Preliminary W49F020 Publication Release Date: October 1999 - 21 - Revision A1 VERSION HISTORY VERSION DATE PAGE DESCRIPTION A1 Oct. 1999
Preliminary W49F020 Publication Release Date: October 1999 - 3 - Revision A1 FUNCTIONAL DESCRIPTION Read Mode The read operation of the W49F02
Preliminary W49F020 - 4 - TBP) when completing programming and return to normal read mode. Data polling and/or Toggle Bits can be used to detect en
Preliminary W49F020 Publication Release Date: October 1999 - 5 - Revision A1 TABLE OF OPERATING MODES Operating Mode Selection (VHH = 12V ±
Preliminary W49F020 - 6 - Command Codes for Byte Program WORD SEQUENCE ADDRESS DATA 0 Write 5555H AAH 1 Write 2AAAH 55H 2 Write 5555H A0H 3 W
Preliminary W49F020 Publication Release Date: October 1999 - 7 - Revision A1 Command Codes for Chip Erase BYTE SEQUENCE ADDRESS DATA 1 Wr
Preliminary W49F020 - 8 - Command Codes for Product Identification and Boot Block Lockout Detection BYTE SEQUENCE ALTERNATE PRODUCT (6) IDENTIFICAT
Preliminary W49F020 Publication Release Date: October 1999 - 9 - Revision A1 Command Codes for Boot Block Lockout Enable BYTE SEQUENCE BOOT
Comments to this Manuals